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Interview process
DFT loops open with a resume-led hiring-manager round, then technical rounds that weight testability architecture (scan, MBIST, JTAG) and ATPG/coverage, plus how you trade test cost against coverage. Architecture and coverage carry the most weight (~60% combined).
5 roundsHiring manager round → DFT architecture round → ATPG & coverage round …
Question bank by sub-domain
Pick a sub-domain to study leveled questions, each tagged with the companies that ask it.
DFT
Scan Design
Scan chains, stitching, shift/capture
1 question
DFT
ATPG
Pattern generation, fault coverage, DTPI
0 questions
DFT
MBIST
Memory BIST, repair, algorithms
0 questions
DFT
JTAG / Boundary Scan
1149.1 TAP, boundary cells
0 questions
DFT
Test Compression
EDT, XOR, ratio vs coverage
1 question
DFT
Fault Models
Stuck-at, transition, bridging, path-delay
2 questions
DFT
DFT Architecture
Test planning, hierarchical DFT, wrappers
1 question
DFT
Low-Power DFT
Power-aware test, shift power
0 questions
DFT
Diagnosis
Failure isolation, volume diagnosis
0 questions